The invention relates to memory devices. More particularly, the invention relates to a method for forming a pattern in a semiconductor device by employing self aligned double exposure technology.
In general, a semiconductor device such as dynamic random access memory (“DRAM”) includes numerous fine patterns. Such patterns are formed through a photolithography process. In order to form a pattern by a photolithography process, a photoresist (“PR”) film is coated over a target layer to be patterned. Next, an exposure process is performed to change solubility in a given portion of the PR film. Subsequently, a developing process is performed to form a PR pattern exposing the target layer. Thus, the PR pattern is formed by removing the portion of which the solubility is changed, or by removing the portion of which the solubility is not changed. Later, the exposed target layer is etched using the PR pattern, and then the PR pattern is stripped to form a target layer pattern.
In the photolithography process, resolution and depth of focus (“DOF”) are two important issues. Resolution (R) can be expressed by Equation 1 below.
                              R          =                                    k              1                        ⁢                          λ              NA                                      ,                            (        1        )            where k1 is a constant determined by a kind and thicknesses of PR film, λ is a wavelength of light source, and NA stands for a “numerical aperture” of exposure equipment.
According to Equation 1, the fineness of the pattern formed over a wafer is an inverse function of the wavelength (λ) of a light source and a direct function of the NA of exposure equipment. However, the wavelength (λ) of light sources being used and the NA of exposure equipment have not kept abreast of rapid advances in integration of semiconductor devices. Therefore, resolution enhancement technology (“RET”) for improving resolution and DOF has been applied by incorporating diverse methods. For example, the RET technology includes phase shift mask (“PSM”), off-axis illumination (“OAI”), optical proximity correction (“OPC”), and the like. Besides, a technology called double exposure technique (“DET”) is capable of forming a fine pattern over a wafer. Critical dimension(“CD”) uniformity in the DET depends on overall overlay accuracy of a first exposure mask and a second exposure mask.
However, it is difficult to control the overlay of the first and second exposure masks to fall within the error range. Moreover, technical difficulties make it difficult to achieve improvement of exposure equipment.